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Concurrency control
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691	Processes and Threads Implementation 1 Learning Outcomes Add to Reading List Source URL: cgi.cse.unsw.edu.au Language: English - Date: 2015-03-30 21:24:48 Threads Parallel computing C POSIX library Concurrency control POSIX Threads Kernel Lock Process Ring Computing Concurrent computing Computer programming
692	Microsoft Word - SPAA-Program3.doc Add to Reading List Source URL: www.cs.jhu.edu Language: English - Date: 2008-06-06 04:01:18 Concurrency control Transaction processing Symposium on Parallelism in Algorithms and Architectures Education in Munich Transactional memory SPAA Conference Kunle Olukotun Garching bei München Technical University Munich Concurrent computing Computing Nir Shavit
693	Microsoft PowerPoint - lect04.pptx Add to Reading List Source URL: cgi.cse.unsw.edu.au Language: English - Date: 2015-03-16 20:17:40 Concurrency control Procedural programming languages C++ C programming language Concurrency Struct ALGOL 68 Lock Mutual exclusion Computing Computer programming Software engineering
694	Light64: Lightweight Hardware Support for Data Race Detection during Systematic Testing of Parallel Programs Adrian Nistor University of Illinois at Urbana-Champaign, USA Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2009-09-09 12:12:53 Concurrency control Concurrent computing Concurrency Lock Thread Software testing Deadlock Parallel computing Monitor Computing Computer programming Software engineering
695	Dynamically Detecting and Tolerating IF-Condition Data Races Shanxiang Qi (Google), Abdullah Muzahid (University of San Antonio), Wonsun Ahn, Josep Torrellas University of Illinois at Urbana-Champaign Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2014-02-20 12:55:50 Concurrent computing Concurrency control Anti-patterns Concurrency Race condition Lock Futures and promises Parallel computing Debugging Computing Software bugs Computer programming
696	Appears in the Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA-30), June[removed]ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes Milos Prv Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2003-04-01 22:10:24 Central processing unit Concurrency control Concurrency Software bugs Parallel computing CPU cache Thread Critical section Micro-Threads Computing Computer architecture Computer hardware
697	A Proposal for a UPC Memory Consistency Model, v1.0 Lawrence Berkeley National Lab Tech Report LBNL[removed]Katherine Yelick Dan Bonachea University of California, Berkeley Charles Wallace Add to Reading List Source URL: upc.gwu.edu Language: English - Date: 2013-12-04 13:04:22 Transaction processing Software engineering Computer memory Compiler construction Memory model Programming language design Consistency model Linearizability Universal Product Code Computing Concurrency control Computer architecture
698	Programming and Debugging Shared Memory Programs with Data Coloring Luis Ceze† , Christoph von Praun‡ , C˘alin Ca¸scaval‡ Pablo Montesinos# and Josep Torrellas# † Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2009-02-28 21:02:25 Data Computing Transactional memory Linearizability Software transactional memory Parallel computing Lock Consistency model Atomicity Transaction processing Concurrency control Data management
699	AtomTracker: A Comprehensive Approach to Atomic Region Inference and Violation Detection∗ Abdullah Muzahid, Norimasa Otsuki† , and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-10-23 11:07:53 Data Transaction processing Computer memory Parallel computing Linearizability CPU cache I1 Cache Q Computing Data management Concurrency control
700	FlexBulk: Intelligently Forming Atomic Blocks in Blocked-Execution Multiprocessors to Minimize Squashes Rishi Agarwal and Josep Torrellas University of Illinois at Urbana-Champaign, USA {agarwa29,torrella}@illinois.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2011-04-01 11:23:57 Parallel computing Lock Compiler optimization C dynamic memory allocation Memory barrier Hazard Critical section Linearizability Concurrency control Computing Computer architecture

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